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@fanoush
Created April 24, 2023 21:13
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armfloat.c

double __attribute__((pcs("aapcs"))) f2d(float f) {
return (double)f;
}

double __attribute__((pcs("aapcs-vfp"))) __hard_f2d(float f){
return (double)f;
}

double __attribute__((pcs("aapcs-vfp"))) __hard_powd(double d){
return d*d;
}
double __attribute__((noinline)) __attribute__((pcs("aapcs"))) __softfp_powd(double d){
return d*d;
}
double __attribute__((pcs("aapcs-vfp"))) __hard_powd_softfp(double d){
return __softfp_powd(d);
}
arm-none-eabi-gcc -c armfloat.c -mfloat-abi=hard -mcpu=cortex-m4  -mfpu=fpv4-sp-d16 -O
arm-none-eabi-objdump -d armfloat.o

armfloat.o:     file format elf32-littlearm


Disassembly of section .text:

00000000 <f2d>:
   0:   b508            push    {r3, lr}
   2:   f7ff fffe       bl      0 <__aeabi_f2d>
   6:   bd08            pop     {r3, pc}

00000008 <__hard_f2d>:
   8:   b508            push    {r3, lr}
   a:   ee10 0a10       vmov    r0, s0
   e:   f7ff fffe       bl      0 <__aeabi_f2d>
  12:   ec41 0b10       vmov    d0, r0, r1
  16:   bd08            pop     {r3, pc}

00000018 <__hard_powd>:
  18:   b508            push    {r3, lr}
  1a:   ec51 0b10       vmov    r0, r1, d0
  1e:   ee10 2a10       vmov    r2, s0
  22:   460b            mov     r3, r1
  24:   f7ff fffe       bl      0 <__aeabi_dmul>
  28:   ec41 0b10       vmov    d0, r0, r1
  2c:   bd08            pop     {r3, pc}

0000002e <__softfp_powd>:
  2e:   b508            push    {r3, lr}
  30:   4602            mov     r2, r0
  32:   460b            mov     r3, r1
  34:   f7ff fffe       bl      0 <__aeabi_dmul>
  38:   bd08            pop     {r3, pc}

0000003a <__hard_powd_softfp>:
  3a:   b508            push    {r3, lr}
  3c:   ec51 0b10       vmov    r0, r1, d0
  40:   f7ff fffe       bl      2e <__softfp_powd>
  44:   ec41 0b10       vmov    d0, r0, r1
  48:   bd08            pop     {r3, pc}

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