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STM32F401C Discovery board added
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cchamilt committed Mar 28, 2014
1 parent ba0fd4e commit 6a8875e
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17 changes: 15 additions & 2 deletions Makefile
Expand Up @@ -24,6 +24,7 @@
# STM32F3DISCOVERY=1
# STM32F4DISCOVERY=1
# STM32F429IDISCOVERY=1
STM32F401CDISCOVERY=1
# CARAMBOLA=1
# RASPBERRYPI=1
# LPC1768=1 # beta
Expand All @@ -33,7 +34,7 @@
# Also:
#
# DEBUG=1 # add debug symbols (-g)
# RELEASE=1 # Force release-style compile (no asserts, etc)
RELEASE=1 # Force release-style compile (no asserts, etc)
# SINGLETHREAD=1 # Compile single-threaded to make compilation errors easier to find
# BOOTLOADER=1 # make the bootloader (not Espruino)
# PROFILE=1 # Compile with gprof profiling info
Expand Down Expand Up @@ -205,6 +206,17 @@ BOARD=STM32F4DISCOVERY
STLIB=STM32F4XX
PRECOMPILED_OBJS+=$(ROOT)/targetlibs/stm32f4/lib/startup_stm32f4xx.o
OPTIMIZEFLAGS+=-O3
else ifdef STM32F401CDISCOVERY
#USB=1
USE_NET=1
USE_GRAPHICS=1
DEFINES += -DUSE_USB_OTG_FS=1
FAMILY=STM32F4
CHIP=STM32F401C
BOARD=STM32F401CDISCOVERY
STLIB=STM32F4XX
PRECOMPILED_OBJS+=$(ROOT)/targetlibs/stm32f4/lib/startup_stm32f4xx.o
OPTIMIZEFLAGS+=-O3
else ifdef STM32F429IDISCOVERY
#USB=1
USE_GRAPHICS=1
Expand Down Expand Up @@ -809,7 +821,8 @@ OPTIMIZEFLAGS += --param inline-unit-growth=15
# 4.5
#export CCPREFIX=~/sat/bin/arm-none-eabi-
# 4.4
export CCPREFIX=arm-none-eabi-
export CCPREFIX=/home/chris/arm-2013.11/bin/arm-none-eabi-
#export CCPREFIX=arm-none-eabi-
endif # ARM

PININFOFILE=$(ROOT)/gen/jspininfo
Expand Down
125 changes: 125 additions & 0 deletions boards/STM32F401CDISCOVERY.py
@@ -0,0 +1,125 @@
#!/bin/false
# This file is part of Espruino, a JavaScript interpreter for Microcontrollers
#
# Copyright (C) 2013 Gordon Williams <gw@pur3.co.uk>
#
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this
# file, You can obtain one at http://mozilla.org/MPL/2.0/.
#
# ----------------------------------------------------------------------------------------
# This file contains information for a specific board - the available pins, and where LEDs,
# Buttons, and other in-built peripherals are. It is used to build documentation as well
# as various source and header files for Espruino.
# ----------------------------------------------------------------------------------------

import pinutils;
info = {
'name' : "STM32F401 Discovery",
'link' : [ "http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1848/PF259098" ],
'default_console' : "EV_SERIAL2", # FIXME: This was S2 because of pin conflict. Not sure if it's really an issue?
'variables' : 2600,
'binary_name' : 'espruino_%v_stm32f401Cdiscovery.bin',
};
chip = {
'part' : "STM32F401VCT6",
'family' : "STM32F4",
'package' : "LQFP100",
'ram' : 64,
'flash' : 256,
'speed' : 84,
'usart' : 3,
'spi' : 4,
'i2c' : 3,
'adc' : 1,
'dac' : 0,
};
# left-right, or top-bottom order
board = {
'left' : [ 'GND', 'VDD', 'GND', 'C1','C3','A1','A3','A5','A7','C5','B1','GND','E7','E9','E11','E13','E15','NC','B13','B15','D9','D11','D13','D15','GND'],
'left2' : [ 'GND', 'VDD', 'NRST', 'C0','C2','A0','A2','A4','A6','C4','B0','B2','E8','E10','E12','E14','B10','B12','B14','D8','D10','D12','D14','NC','GND'],
'right2' : [ 'GND', '5V', '3V3', 'H0', 'C14','E6','E4','E2','E0','B8','BOOT0','B6','B4','D7','D5','D3','D1','C12','C10','A14','A10','A8','C8','C6','GND'],
'right' : [ 'GND', '5V', '3V3', 'H1', 'C15','C13','E5','E3','E1','B9','VDD','B7','B5','B3','D6','D4','D2','D0','C11','A15','A13','A9','C9','C7','GND'],
};
devices = {
'OSC' : { 'pin_1' : 'H0',
'pin_2' : 'H1' },
'OSC_RTC' : { 'pin_1' : 'C14',
'pin_2' : 'C15' },
'LED1' : { 'pin' : 'D13' },
'LED2' : { 'pin' : 'D12' },
'LED3' : { 'pin' : 'D14' },
'LED4' : { 'pin' : 'D15' },
'BTN1' : { 'pin' : 'A0' },
'USB' : { 'pin_otg_pwr' : 'C0',
'pin_dm' : 'A11',
'pin_dp' : 'A12',
'pin_vbus' : 'A9',
'pin_id' : 'A10', },
'MEMS' : { 'device' : 'LIS302DL',
'pin_cs' : 'E3',
'pin_int1' : 'E0',
'pin_int2' : 'E1',
'pin_mosi' : 'A7',
'pin_miso' : 'A6',
'pin_sck' : 'A5' },
'MIC' : { 'device' : 'MP45DT02',
'pin_clk' : 'C3',
'pin_dout' : 'B10', },
'AUDIO' : { 'device' : 'CS43L22',
'pin_sda' : 'B9',
'pin_scl' : 'B6',
'pin_mclk' : 'C7',
'pin_sclk' : 'C10',
'pin_sdin' : 'C12',
'pin_lrck' : 'A4',
'pin_nrst' : 'D4',
},
};


board_css = """
#board {
width: 680px;
height: 1020px;
left: 200px;
background-image: url(img/STM32F4DISCOVERY.jpg);
}
#boardcontainer {
height: 1020px;
}
#left {
top: 375px;
right: 590px;
}
#left2 {
top: 375px;
left: 105px;
}
#right {
top: 375px;
left: 550px;
}
#right2 {
top: 375px;
right: 145px;
}
""";

def get_pins():
pins = pinutils.scan_pin_file([], 'stm32f401.csv', 6, 9, 10)
return pinutils.only_from_package(pinutils.fill_gaps_in_pin_list(pins), chip["package"])

# 'MEMS' : { 'device' : 'L3GD20',
# 'pin_cs' : 'E3',
# 'pin_int1' : 'E0',
# 'pin_int2' : 'E1',
# 'pin_mosi' : 'A7',
# 'pin_miso' : 'A6',
# 'pin_sck' : 'A5' },
# 'MEMS2' : { 'device' : 'LSM303DLHC',
# 'pin_scl' : 'B6',
# 'pin_sda' : 'B9',
# 'pin_int1' : 'E5',
# 'pin_int2' : 'E4' },
110 changes: 110 additions & 0 deletions boards/pins/stm32f401.csv
@@ -0,0 +1,110 @@
UQFN48,WLCSP49,LQFP64,LQFP100,UFBGA100,Name,Type,IO,Alternate,Additional
,,,1,B2,PE2,I/O,FT,SPI4_SCK/TRACECLK/EVENTOUT,
,,,2,A1,PE3,I/O,FT,TRACED0/EVENTOUT,
,,,3,B1,PE4,I/O,FT,SPI4_NSS/TRACED1/EVENTOUT,
,,,4,C2,PE5,I/O,FT,SPI4_MISO/TIM9_CH1/TRACED2/EVENTOUT,
,,,5,D2,PE6,I/O,FT,SPI4_MOSI/TIM9_CH2/TRACED3/EVENTOUT,
,,,,D3,VSS,S,,,
,,,,C4,VDD,S, ,,
1,B7,1,6,E2,VBAT,S, ,,
2,D5,2,7,C1,PC13-ANTI_TAMP,I/O,FT,EVENTOUT,RTC_TAMP1/RTC_OUT/RTC_TS
3,C7,3,8,D1,PC14-OSC32_IN(PC14),I/O,FT,EVENTOUT,OSC32_IN
4,,4,9,E1,PC15-OSC32_OUT(PC15),I/O,FT,EVENTOUT,OSC32_OUT
,,,10,F2,VSS,S,,,
,,,11,G2,VDD,S,,,
5,D7,5,12,F1,PH0/OSC_IN,I/O,FT,EVENTOUT,OSC_IN
6,D6,6,13,G1,PH1/OSC_OUT,I/O,FT,EVENTOUT,OSC_OUT
7,E7,7,14,H2,NRST,I/O,RST,EVENTOUT,
,,8,15,H1,PC0,I/O,FT,EVENTOUT,ADC1_IN10
,,9,16,J2,PC1,I/O,FT,EVENTOUT,ADC1_IN11
,,10,17,J3,PC2,I/O,FT,SPI2_MISO/I2S2ext_SD/EVENTOUT,ADC1_IN12
,,11,18,K2,PC3,I/O,FT,SPI2_MOSI/I2S2_SD/EVENTOUT,ADC1_IN13
,,,19,,VDD,S,,,
8,E6,12,20,,VSSA/VREF-,S,,,
,,,,J11,VSSA,S,,,
,,,,K1,VREF-,S,,,
9,,13,,,VDDA/VREF+,S,,,
,,,21,L1,VREF+,S,,,
,F7,,22,M1,VDDA,S,,,
10,F6,14,23,L2,PA0-WKUP(PA0),I/O,FT,USART2_CTS/TIM2_CH1/TIM2_ETR/TIM5_CH1/EVENTOUT,ADC1_IN0/WKUP
11,G7,15,24,M2,PA1,I/O,FT,USART2_RTS/TIM2_CH2/TIM5_CH2/EVENTOUT,ADC1_IN1
12,E5,16,25,K3,PA2,I/O,FT,USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/EVENTOUT,ADC1_IN2
13,E4,17,26,L3,PA3,I/O,FT,USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/EVENTOUT,ADC1_IN3
,,18,27,,VSS,S,,,
,,19,28,,VDD,S,,,
,,,,E3,BYPASS_REG,I,FT,,
14,G6,20,29,M3,PA4,I/O,FT,SPI1_NSS/SPI3_NSS/USART2_CK/I2S3_WS/EVENTOUT,ADC1_IN4
15,F5,21,30,K4,PA5,I/O,FT,SPI1_SCK/TIM2_CH1/TIM2_ETR/EVENTOUT,ADC1_IN5
16,F4,22,31,L4,PA6,I/O,FT,SPI1_MISO/TIM3_CH1/TIM1_BKIN/EVENTOUT,ADC1_IN6
17,F3,23,32,M4,PA7,I/O,FT,SPI1_MOSI/TIM3_CH2/TIM1_CH1N/EVENTOUT,ADC1_IN7
,,24,33,K5,PC4,I/O,FT,EVENTOUT,ADC1_IN14
,,25,34,L5,PC5,I/O,FT,EVENTOUT,ADC1_IN15
18,G5,26,35,M5,PB0,I/O,FT,TIM3_CH3/TIM1_CH2N/EVENTOUT,ADC1_IN8
19,G4,27,36,M6,PB1,I/O,FT,TIM3_CH4/TIM1_CH3N/EVENTOUT,ADC1_IN9
20,G3,28,37,L6,PB2-BOOT1(PB2),I/O,FT,EVENTOUT,
,,,38,M7,PE7,I/O,FT,TIM1_ETR/EVENTOUT,
,,,39,L7,PE8,I/O,FT,TIM1_CH1N/EVENTOUT,
,,,40,M8,PE9,I/O,FT,TIM1_CH1/EVENTOUT,
,,,41,L8,PE10,I/O,FT,TIM1_CH2N/EVENTOUT,
,,,42,M9,PE11,I/O,FT,SPI4_NSS/TIM1_CH2/EVENTOUT,
,,,43,L9,PE12,I/O,FT,SPI4_SCK/TIM1_CH3N/EVENTOUT,
,,,44,M10,PE13,I/O,FT,SPI4_MISO/TIM1_CH3/EVENTOUT,
,,,45,M11,PE14,I/O,FT,SPI4_MOSI/TIM1_CH4/EVENTOUT,
,,,46,M12,PE15,I/O,FT,TIM1_BKIN/EVENTOUT,
21,E3,29,47,L10,PB10,I/O,FT,SPI2_SCK/I2S2_CK/I2C2_SCL/TIM2_CH3/EVENTOUT,
,,,,K9,PB11,I/O,FT,EVENTOUT,
22,G2,30,48,L11,VCAP_1,S,,,
23,D3,31,49,F12,VSS,S,,,
24,F2,32,50,G12,VDD,S,,,
25,E2,33,51,L12,PB12,I/O,FT,SPI2_NSS/I2S2_WS/I2C2_SMBA/TIM1_BKIN/EVENTOUT,
26,G1,34,52,K12,PB13,I/O,FT,SPI2_SCK/I2S2_CK/TIM1_CH1N/EVENTOUT,
27,F1,35,53,K11,PB14,I/O,FT,SPI2_MISO/TIM1_CH2N/I2S2ext_SD/EVENTOUT,
28,E1,36,54,K10,PB15,I/O,FT,SPI2_MOSI/I2S2_SD/TIM1_CH3N/EVENTOUT,RTC_REFIN
,,,55,,PD8,I/O,FT,EVENTOUT,
,,,56,K8,PD9,I/O,FT,EVENTOUT,
,,,57,J12,PD10,I/O,FT,EVENTOUT,
,,,58,J11,PD11,I/O,FT,EVENTOUT,
,,,59,J10,PD12,I/O,FT,TIM4_CH1/EVENTOUT,
,,,60,H12,PD13,I/O,FT,TIM4_CH2/EVENTOUT,
,,,61,H11,PD14,I/O,FT,TIM4_CH3/EVENTOUT,
,,,62,H10,PD15,I/O,FT,TIM4_CH4/EVENTOUT,
,,37,63,E12,PC6,I/O,FT,I2S2_MCK/SDIO_D6/USART6_TX/TIM3_CH1/EVENTOUT,
,,38,64,E11,PC7,I/O,FT,I2S3_MCK/SDIO_D7/USART6_RX/TIM3_CH2/EVENTOUT,
,,39,65,E10,PC8,I/O,FT,SDIO_D0/TIM3_CH3/USART6_CK/EVENTOUT,
,,40,66,D12,PC9,I/O,FT,I2S_CKIN/MCO_2/SDIO_D1/I2C3_SDA/TIM3_CH4/EVENTOUT,
29,D1,41,67,D11,PA8,I/O,FT,MCO+1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT,
30,D2,42,68,D10,PA9,I/O,FT,USART1_TX/TIM1_CH2/I2C3_SMBA/EVENTOUT,OTG_FS_VBUS
31,C2,43,69,C12,PA10,I/O,FT,USART1_RX/TIM1_CH3/OTG_FS_ID/EVENTOUT,
32,C1,44,70,B12,PA11,I/O,FT,USART1_CTS/USART6_TX/TIM1_CH4/OTG_FS_DM/EVENTOUT,
33,C3,45,71,A12,PA12,I/O,FT,USART1_RTS/USART6_RX/TIM1_ETR/OTG_FS_DP/EVENTOUT,
34,B3,46,72,A11,PA13(JTMS-SWDIO),I/O,FT,JTMS-SWDIO/EVENTOUT,
,,,73,C11,VCAP_2,S,,,
35,B1,47,74,F11,VSS,S,,,
36,,48,75,G11,VDD,S,,,
,B2,,,,VDD,S,,,
37,A1,49,76,A10,PA14(JTCK-SWCLK),I/O,FT,JTCK-SWCLK/EVENTOUT,
38,A2,50,77,A9,PA15(JTDI),I/O,FT,JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1/TIM2_ETR/SPI1_NSS/EVENTOUT,
,,51,78,B11,PC10,I/O,FT,SPI3_SCK/I2S3_CK/SDIO_D2/EVENTOUT,
,,52,79,C10,PC11,I/O,FT,SPI3_MISO/SDIO_D3/I2S3ext_SD/EVENTOUT,
,,53,80,B10,PC12,I/O,FT,SDIO_CK/SPI3_MOSI/I2S3_SD/EVENTOUT,
,,,81,C9,PD0,I/O,FT,EVENTOUT,
,,,82,B9,PD1,I/O,FT,EVENTOUT,
,,54,83,C8,PD2,I/O,FT,TIM3_ETR/SDIO_CMD/EVENTOUT,
,,,84,B8,PD3,I/O,FT,SPI2_SCK/I2S2_CK/USART2_CTS/EVENTOUT,
,,,85,B7,PD4,I/O,FT,USART2_RTS/EVENTOUT,
,,,86,A6,PD5,I/O,FT,USART2_TX/EVENTOUT,
,,,87,B6,PD6,I/O,FT,USART2_RX/EVENTOUT,
,,,88,A5,PD7,I/O,FT,USART2_CK/EVENTOUT,
39,A3,55,89,A8,PB3(JTDO/TRACESWO),I/O,FT,JTDO-SWO/SPI3_SCK/I2S3_CK/I2C2_SDA/TIM2_CH2/SPI1_SCK/EVENTOUT,
40,A4,56,90,A7,PB4(NJTRST),I/O,FT,NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2C3_SDA/I2S3ext_SD/EVENTOUT,
41,B4,57,91,C5,PB5,I/O,FT,I2C1_SMBA/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/EVENTOUT,
42,C4,58,92,B5,PB6,I/O,FT,I2C1_SCL/TIM4_CH1/USART1_TX/EVENTOUT,
43,D4,59,93,B4,PB7,I/O,FT,I2C1_SDA/USART1_RX/TIM4_CH2/EVENTOUT,
44,A5,60,94,A4,BOOT0,I,B,,VPP
45,B5,61,95,A3,PB8,I/O,FT,TIM4_CH3/SDIO_D4/TIM10_CH1/I2C1_SCL/EVENTOUT,
46,C5,62,96,B3,PB9,I/O,FT,SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/I2C1_SDA/EVENTOUT,
,,,97,C3,PE0,I/O,FT,TIM4_ETR/EVENTOUT,
,,,98,A2,PE1,I/O,FT,EVENTOUT,
47,A6,63,99,H3,VSS,S,,,
,B6,,,,PDR_ON,I,FT,,
48,A7,64,100,,VDD,S,,,

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