As per @smunaut suggestion. I have added a pad that allows for an easy addition of an SPI RAM chip in SO8 package piggybacked onto the existing flash chip. We can't use ram and flash at the same time but we can use them in the same design by using ~LEDG signal as CS for the RAM. It is good enough for V1.0 ;)

@esden, I can't identify that pad in the schematics or the figures in the readme. Was it removed in the end?

Next to pin 37 of the fpga in https://github.com/icebreaker-fpga/icebreaker/blob/master/hardware/v1.0e/icebreaker-sch.pdf

@smunaut thanks. I misunderstood the meaning of "piggybacked" and I was looking for an unpopulated footprint at the bottom. All clear now.

@umarcor Right, it might not be clear for everyone. I am putting a photo of how it comes together for reference.