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Currently, chips with 8kB RAM are stuck in a nasty middle-ground. Some of that 8kB (maybe 3kB) is needed for buffers and stack, but the other 5kB is available. However Espruino has 3 compilation modes:
8 bit addresses: max 255 vars, each var is 16 bytes
16 bit addresses: max 65535 vars, each var is 20 bytes
32 bit addresses: billions of vars, each var is 28 bytes
5kB/16 = 320 vars (too many for our 255 limit), but 5kB/20 = 256. So really we're better off using 8 bit addresses and having more stack space free.
The best solution here would be to add 9 bit addresses (storing the extra bit for each of the 4 'pointers' in the variable flags). Worst case this would push the size of the flags up and make vars 17 bytes, but even so we could use 60 extra variables.
It'd be great if there could be a solution that could use 10 or 11 bits if needed too. Other devices (20kB ones) would really benefit from that.
IMO it's probably not a big deal - replace all references to firstChild/etc with preprocessor macros a bit like:
Currently, chips with 8kB RAM are stuck in a nasty middle-ground. Some of that 8kB (maybe 3kB) is needed for buffers and stack, but the other 5kB is available. However Espruino has 3 compilation modes:
5kB/16 = 320 vars (too many for our 255 limit), but 5kB/20 = 256. So really we're better off using 8 bit addresses and having more stack space free.
The best solution here would be to add 9 bit addresses (storing the extra bit for each of the 4 'pointers' in the variable flags). Worst case this would push the size of the flags up and make vars 17 bytes, but even so we could use 60 extra variables.
It'd be great if there could be a solution that could use 10 or 11 bits if needed too. Other devices (20kB ones) would really benefit from that.
IMO it's probably not a big deal - replace all references to firstChild/etc with preprocessor macros a bit like:
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